The use of solder bumps in attaching die to flip-chip packaging is well known in the art. FIG. 1 and FIG. 2 (the later of which is a magnified view of REGION 2 of FIG. 1) illustrate one prior art configuration 10 that can be used for this purpose. As shown therein, a die 11 is provided which has an I/O pad or die pad 13 disposed thereon. A photo polymer passivation layer 17 is provided to protect the die from damage during processing. An Under Bump Metallurgy (UBM) structure 15 is disposed on the die pad, and a solder ball 19 is placed or formed on top of the UBM structure. The solder ball is used to form an electrical and mechanical connection between the die and a Printed Circuit Board (PCB) 21 or other device.
One issue of concern in flip chip packaging, and indeed in devices utilizing solder die attach in general, is solder fatigue. In a typical device, a solder ball provides a joint between two substrates, such as a die and a PCB, that have differing coefficients of thermal expansion. Consequently, varying amounts of stress and strain are applied to the joints as the device is exposed to thermal cycles. Moreover, residual stresses typically exist across the solder joint even at normal operating temperatures, as a result of the process used to form the joint. Over time, these forces can cause the solder joint to crack, which may result in mechanical and/or electrical failure of the joint.
A number of efforts have been made in the art to reduce solder joint fatigue in these devices. For example, some devices have been made in which the two substrates joined across a ball grid array are made to have similar coefficients of thermal expansion, thus reducing the amount of stress and strain on the solder joint attendant to thermal cycling. However, this approach places severe material design constraints on the overall device, and is thus impractical for many applications.
Other approaches have focused on solder ball compositions or constructions which are better able to withstand the stress and strain accompanying thermal cycling. While some of these approaches have indeed improved solder joint life, the rate of solder joint failure in flip chip devices is still too high.
In some constructions, a Stress Compensation Layer (SCL) is provided around the solder joint to provide additional mechanical integrity to the package. In theory, the SCL acts to hinder some stress-related solder joint failure mechanisms, thus improving the life of the package. In reality, however, adhesion between the solder and the SCL is often very poor, so that the benefits of the SCL layer are not fully realized (e.g., the SCL does not act effectively as a stress compensation layer). Moreover, the SCL is conventionally applied after solder ball placement. In order for die attach to be implemented, this typically requires a grinding operation to remove the SCL that has accumulated on top of the solder balls. Thus, in one commonly used manufacturing scheme, grinding is used to expose the solder bumps, after which a second solder bump is disposed on the first solder bump to achieve die attach. However, the step of adding an additional solder ball, and especially the step of grinding, are very undesirable and add cost, complication, and yield issues to the package manufacturing process.
In some suggested approaches, solder joints are reinforced after die attach by an underfill operation. This involves the application of an adhesive between the die and a PCB after die attach is implemented. The laminar flow of adhesive between the two structures is facilitated by capillary action. Because the adhesive forms an additional load-bearing structure between the die and the package, stresses on the solder joint are alleviated somewhat, and the life of the package may be increased. However, underfill operations are very undesirable because they require the end user to perform additional steps in the die attach process. Due to the extreme price sensitivities of chip product manufacturing, the additional costs and throughput issues associated with an underfill operation make it an economically unfeasible option for many applications. Moreover, the underfill operation complicates the manufacturing process, reduces yields and, when it is performed by the end user and not the chip manufacturer, presents quality control issues. Also, the use of an underfill leads to a device which is not reworkable. However, many applications involve the attachment of a plurality of chips to a PCB. Hence, if the multi-chip device is not reworkable, a defect in any one of the chips will require that the entire device be discarded.